3^rd Workshop on Nano Security: From Nano-Electronics to Secure Systems (NanoSec’25)

29 March – 2 April 2025, Lyon, France, co-located with Design Automation and Test in Europe (DATE) Conference

Today’s societies critically depend on electronic systems. Security of such systems are facing completely new challenges due to the ongoing transition to radically new types of nano-electronic devices, such as memristors, spintronics, or carbon nanotubes. The use of such emerging nano-technologies is inevitable to address the essential needs related to energy efficiency, computing power and performance. Therefore, the entire industry are switching to emerging nano-electronics alongside scaled CMOS technologies in heterogeneous integrated systems. These technologies come with new properties and also facilitate the development of radically different computer architectures.

The third edition of the NanoSec workshop will bring together researchers from hardware-oriented security and from emerging hardware technology. It will explore the potential of new technologies and architectures to provide new opportunities for achieving security targets, but it will also raise questions about their vulnerabilities to new types of hardware-oriented attacks. The workshop is based on a Priority Program https://spp-nanosecurity.uni-stuttgart.de/ funded since 2019 by the German DFG, and will be open to members and non-members of that Priority Program alike.

The workshop invites submissions on, but not limited to, the following topics:

• Nano-electronic security primitives, such as physical unclonable functions, random number generators, cryptographic blocks, reconfigurable nano-fabrics, or obfuscation/camouflaging structures
• Integration of secure primitives into larger systems, protocols and architectures, translating security guarantees defined and validated for lower-level primitives in higher-order, system- and architecture-level security properties
• Attacks against systems with nano-electronic components, including side-channel analysis, fault injection, microarchitectural covert channels, and countermeasures against such attacks

A submission can describe a novel scientific result, provide a position statement about a new and relevant problem, or report a case study on practical experiences with a technique from the list above. The submissions should not be formally published in the past. The workshop will have no formal proceedings, so authors will be free to resubmit their work to conferences or journals. Accepted papers can, at the discretion and with an approval of their authors, be published on the workshop’s website.

Submissions in form of full 6-page papers or 1-2 page extended abstracts (in IEEE double-column format, either A4 or US Letter) should be submitted through EasyChair:

Submission deadline: January 14, 2025
Acceptance notification: January 21, 2025

PDF file for publishing on the workshop’s website (optional): March 10, 2025

Workshop: March 31 –April 2, 2025 (exact time slot to be announced)

Registration:
This workshop is co-located with the Design, Automation and Test in Europe Conference and will use its registration facilities. Please register through the DATE website:

Ilia Polian, University of Stuttgart, Germany
Nan Du, Friedrich Schiller University Jena, Germany
Yunsi Fey, Northeaster University, Boston, USA
Shahar Kvatinsky, Technion – Israel Institute of Technology
Fareena Saqib, University of North Carolina, Charlotte, USA

The workshop is organized by the Priority Program Nano Security
https://spp-nanosecurity.uni-stuttgart.de/